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Carrier Recovery Techniques

Modems utilizing phase modulation must regenerate the carrier signal before the phase of the input signal can be determined. One way to regenerate the carrier is to use a squaring loop.

Squaring Loop

 

To verify that this circuit recreates the carrier, we simply apply all the possible input signals and observe what happens at the output.

Case I - assume a BPSK input

After the HPF we obtain:         

After the divider we obtain:      

This carrier signal is now independent of the data signal.

Case II - assume a 4-PSK input

After the HPF we obtain:         

The sign inversion in front of p is of no consequence since cosine is an even function.

After the divider we obtain:      

Again, this is a carrier signal independent of the data signal.

Phase Locked Loop (Linearized)

A second way to regenerate a carrier is to use a PLL. These loops can be either digital or analog in nature. Their operation is easiest to analyze when they are composed of linear analog circuits. This method is usable with FSK, PSK and QAM based modems.

let the input =

let the VCO output =

Then the multiplier output is:

After the LPF we obtain:

If  then q is irrelevant and the circuit is not in lock.

However, if

 the output is positive

 the output is negative

 

Therefore this signal can be used to drive the VCO in such a way that it will force . This is the frequency locked state.

When , then the output of the LPF is , where q is the phase difference between the input and VCO output. Since this term is an odd function, it can be used to drive the VCO such that phase lock is maintained. Note that the zero error signal occurs when the input and VCO output are in phase quadrature.

Costas Loop (Linearized)

This circuit will acquire lock in exactly the same manner as the standard PLL.

Assume a BPSK input and that the circuit is initially in the unlocked state:

Input

VCO Output

Top Multiplier Output

After the LPF

Bottom Multiplier Output

After the LPF

 

The output of the right hand multiplier will then be:

This is produces an error voltage proportional to 2 times the difference frequency, and is used to drive the VCO in the same manner as a standard PLL.

Once frequency lock is achieved and , then:

Input

VCO Output

Top Multiplier Output

After the LPF

Bottom Multiplier Output

After the LPF

 

The output of the right hand multiplier will then be of the form:

An error signal proportional to 2 times the phase angle difference is created. This implies that the data is therefor decoded.

Note however that this function is now cyclic and the Costas loop may lock into 1 of 2 possible states. Consequently, data may appear in either output. For this reason, differential encoding of the data must be employed.

If one injects a 4-PSK signal, the results are the same.

For Further Research

AN-1298 An Introduction to Digital Modulation by hp