Carrier Recovery Techniques
Modems utilizing phase modulation must regenerate the
carrier signal before the phase of the input signal can be determined.
One way to regenerate the carrier is to use a squaring loop.
Squaring Loop
To verify that this circuit recreates the carrier, we
simply apply all the possible input signals and observe what happens
at the output.
Case I  assume a BPSK input
_{ }
_{ }
After the HPF we obtain:
_{ }
After the divider we obtain:
_{ }
This carrier signal is now independent of the data signal.
Case II  assume a 4PSK input
_{ }
_{ }
After the HPF we obtain:
_{ }
The sign inversion in front of p
is of no consequence since cosine is an even function.
After the divider we obtain:
_{ }
Again, this is a carrier signal independent of the data
signal.
Phase Locked Loop (Linearized)
A second way to regenerate a carrier is to use a PLL.
These loops can be either digital or analog in nature. Their operation
is easiest to analyze when they are composed of linear analog
circuits. This method is usable with FSK, PSK and QAM based modems.
let the input = _{ }
let the VCO output = _{ }
Then the multiplier output is:
_{ }
After the LPF we obtain:
_{ }
If _{ } then
q
is irrelevant and the circuit is not in lock.
However, if
_{ } the
output is positive
_{ } the
output is negative
Therefore this signal can be used to drive the VCO in
such a way that it will force _{ } . This is the frequency locked
state.
When _{ } , then the output of the LPF
is _{ } , where q
is the phase difference between the input and VCO output. Since
this term is an odd function, it can be used to drive the VCO
such that phase lock is maintained. Note that the zero error signal
occurs when the input and VCO output are in phase quadrature.
Costas Loop (Linearized)
This circuit will acquire lock in exactly the same manner
as the standard PLL.
Assume a BPSK input and that the circuit is initially
in the unlocked state:
Input

_{
}

VCO
Output

_{
}

Top
Multiplier Output

_{
}

After
the LPF

_{
}

Bottom
Multiplier Output

_{
}

After
the LPF

_{
}

The output of the right hand multiplier will then be:
_{ }
This is produces an error voltage proportional to 2 times
the difference frequency, and is used to drive the VCO in the
same manner as a standard PLL.
Once frequency lock is
achieved and _{ } , then:
Input

_{
}

VCO
Output

_{
}

Top
Multiplier Output

_{
}

After
the LPF

_{
}

Bottom
Multiplier Output

_{
}

After
the LPF

_{
}

The output of the right hand multiplier will then be
of the form:
_{ }
An error signal proportional to 2 times the phase angle
difference is created. This implies that the data is therefor
decoded.
Note however that this function is now cyclic and the
Costas loop may lock into 1 of 2 possible states. Consequently,
data may appear in either output. For this reason, differential
encoding of the data must be employed.
If one injects a 4PSK signal, the results are the same.
For Further Research


AN1298 An Introduction to Digital Modulation by
hp
